Method for manufacturing bonded wafer

ABSTRACT

A method for manufacturing a bonded wafer, in which when a bonded wafer is manufactured using an ion implantation separation method, impurities attached in the ion implantation step can be removed effectively, and less failure called a void is generated on the bonding surface.  
     Impurities such as particles or organic substances attached in ion implantation step (c) are removed using a physical removal method (d). The surface of a first wafer ( 1 ) subjected to impurities removal is closely contacted onto the surface of a second wafer ( 2 ) for heat treatment (e). The first wafer is separated in a thin-film form at a micro bubble layer (f).

TECHNICAL FIELD

[0001] The present invention relates to a so-called ion implantationseparation method in which a wafer to which hydrogen or rare gas ionsare implanted, is separated after heat treatment to manufacture a bondedwafer, more specifically, to a method for manufacturing a bonded SOIwafer which causes, on the bonding surface, less bonding failure calleda void.

CONVENTIONAL ART

[0002] As a method for manufacturing a bonded SOI (Silicon On Insulator)wafer using a bonding method, there has conventionally been known atechnique for bonding two silicon wafers together via a silicon oxidefilm, for example, as disclosed in Japanese Patent Publication No. Hei5-46086, a method in which an oxide film is formed on at least one ofthe two wafers, the wafers are closely contact with each other so as notto contain any foreign matters between the surfaces to be bonded, andthey are subjected to a heat treatment at a temperature of 200 to 1200°C. to enhance the bonding strength.

[0003] The bonded wafer whose bonding strength is enhanced by performingheat treatment can be subjected to later grinding and polishingprocesses. The thickness of the element fabrication side wafer isreduced to a predetermined thickness by grinding and polishing to forman SOI layer for element forming.

[0004] A bonded SOI wafer produced as described above has advantages ofexcellent crystallinity of the SOI layer and high reliability of theproduced buried oxide layer existing immediately below the SOI layer.However, because a thin film should be formed by grinding and polishing,the operation for producing the thin film takes time, and there aregenerated material loss. In addition, the uniformity of the filmthickness obtained by this method is only in a level of the desired filmthickness ±0.3 μm.

[0005] In recent years, with high-integration and high-speed ofsemiconductor devices, the thickness of the SOI layer must be madesmaller and improve the film thickness uniformity. Specifically, thefilm thickness and the film thickness uniformity of about 0.1±0.01 μmare required.

[0006] In order that the thin film SOI wafer having such a filmthickness and film thickness uniformity is realized by a bonded wafer, aprocess for reducing the thickness using conventional grinding andpolishing is impossible. As a new thin-film technique, there isdeveloped an ion implantation separation method disclosed in JapaneseLaid-Open Patent Publication No. Hei 5-211128 or a method called ahydrogen ion separation method (also called a Smart Cut (trademark)method).

[0007] This hydrogen ion separation method is a technique that comprisesforming an oxide film on at least one of two silicon wafers, implantingat least one of hydrogen ions or rare gas ions into one of the siliconwafers from its upper surface to form a fine bubble layer (enclosedlayer) inside the silicon wafer, bringing the ion implanted surface intocontact with the other wafer via the oxide film, then subjecting thewafers to a heat treatment (separation heat treatment) to separate oneof the wafer as a thin film at the fine bubble layer as a cleavage plane(separating plane), and further subjecting them to a heat treatment(bonding heat treatment) for firmly bonding them to obtain an SOI wafer.

[0008] There has recently been also known a method for manufacturing anSOI wafer in which hydrogen ions are excited to perform ion implantationin a plasma state for separation at room temperature without adding aspecial heat treatment.

[0009] In this method, the cleavage plane is a good mirror surface, andan SOI wafer having an extremely high uniformity of the SOI layer can beobtained relatively easily. The thin-film wafer separated can also bereused, so that the material can be used effectively.

[0010] Further, in this method, silicon wafers can be directly bondedtogether without interposing an oxide film. This method is used not onlyin the case of bonding the silicon wafers together, but also in the caseof implanting ions to a silicon wafer to be bonded to an insulator wafersuch as quartz, silicon carbide, and alumina having different thermalexpansion coefficients, or in the case of implanting ions to aninsulator wafer to be bonded to other wafer, thereby manufacturing awafer having these thin films.

[0011] When manufacturing a bonded wafer using the ion implantationseparation method, organic substances or particles attached in the ionimplantation step cause, in the bonding interface, bonding failurecalled a void. Usually, a wafer to which ions are implanted is subjectedto RCA cleaning or organic-substance removing and cleaning, and then, isbonded to the other wafer. The RCA cleaning is a typical cleaning methodin the semiconductor process, based on two kinds of cleaning solutionsof SC-1 (NH₄OH/H₂O₂/H₂O mixture) and SC-2 (HCl/H₂O₂/H₂O mixture), andcan remove impurities such as particles, organic substances, or metalcontaminants.

[0012] When a wafer to which ions are implanted is cleaned using theconventional cleaning method as described above to manufacture a bondedwafer, the void generation rate cannot be always reduced to a levelsatisfied. In particular, when no voids are observed immediately afterbonding or after separation heat treatment, voids of small size (below 1mm) observed after bonding heat treatment or a step called touch polishfor slightly polishing the separated surface after bonding heattreatment may be generated. The reduction thereof has been required.

DISCLOSURE OF THE INVENTION

[0013] The present inventors have examined in detail a void generatedthrough the usual cleaning step as described above. Consequently, it isapparent that a void tends to generate in the case that impurities suchas particles or organic substances attached in the ion implantation stepremain without being removed by the conventional chemical cleaning orthe wafer surface becomes rough by ion implantation. To remove anyimpurities such as remaining particles or surface roughness, the presentinvention has been completed by conceiving use of a physical removingmethod.

[0014] As s specific method for physically removing impurities, forexample, CMP can be used. The CMP polishing physically scrapesimpurities such as particles or organic substances present on thesurface to which ions are implanted and cannot be removed by chemicalcleaning, and can improve surface roughness caused in the ionimplantation step, thereby removing of void generation.

[0015] “CMP” in the present invention will be defined herein.

[0016] One of recent device process techniques emphasized is a techniquecalled CMP (Chemical and Mechanical Polishing). A CMP technique in abroad meaning is not a new technique and has been long used in mirrorpolishing for silicon wafers as typical chemical and mechanicalpolishing. On the other hand, CMP in a narrow meaning which has beenfocused on recently is one kind of a flattening technique in deviceprocess, and is typically a technique composed mainly of a physicalflattening technique for flattening an interlayer insulator film such asoxide film or a metal film such as wiring. When CMP is simply describedin the present invention, it will represent the CMP in a narrow meaning.

BRIEF DESCRIPTION OF DRAWINGS

[0017] FIGS. 1(A) and 1(B) are flowcharts showing one example of amethod for manufacturing a bonded SOI wafer according to the presentinvention and are respectively, a method performed by forming an oxidefilm only at a base wafer side to which ions are not implanted, and amethod for performing ion implantation after an oxide film is formed ona bond wafer.

BEST MODE FOR CARRYING OUT THE INVENTION

[0018] To describe the present invention in greater detail, an examplein which silicon wafers are bonded together to manufacture an SOI waferwill be described with reference to FIGS. 1(A) and 1(B). However, thepresent invention is not limited to this.

[0019] In step (a), two silicon wafers 1, 2 are prepared and are siliconsingle crystal wafers each at least having a surface to be bonded beingsubjected to mirror polishing. The numeral 1 denotes a bond wafer (afirst wafer), and the numeral 2 denotes a base wafer (a second wafer).

[0020] In step (b), any one of the two silicon wafers 1, 2 is formedwith an oxide film 3. The oxide film becomes a buried oxide layer of anSOI wafer, and the thickness thereof is set according to application.

[0021] In step (c), ions are implanted to the bond wafer 1 as an SOIlayer. At least one of hydrogen ions or rare gas ions, here, hydrogenions are implanted from the top surface of one of the surfaces of thebond wafer 1 (the surface to be bonded to the base wafer 2) to form amicro bubble layer (an enclosing layer) 4 in parallel with the surfaceat the average penetration depth of the ion. The wafer temperatureduring the implantation is preferably below 450° C., more preferablybelow 200° C. The implantation energy is suitably determined by thetargeted thickness of the SOI layer of an SOI wafer to be manufactured.When ions are implanted to a bare silicon not formed with the oxide filmon the surface, ions are preferably implanted at a slightly tiltedimplantation angle so as not to be in parallel with the crystal axis ofthe bond wafer 1 to prevent channeling effect.

[0022] After the step (c), conventionally, the both wafers 1, 2 passedthrough the cleaning step (the chemical cleaning method) are bondedtogether. The present invention, as a surface treatment before bonding,performs impurities removing process (d) for removing impuritiesattached onto the bond wafer 1 surface to which ions are implanted. Aphysical method is used as the impurities removing process (d).Specifically, examples thereof include usual chemical and mechanicalpolishing provided with both physical removal and chemical removal, CMPcomposed mainly of physical removal, and brush cleaning, and can be usedin combination with the conventional chemical cleaning method. In thecase of performing chemical cleaning after the physical removal, theimpurities removing effect by the physical removing step can givesufficient cleaning effect when chemical liquid concentration ofchemical cleaning is lowered than usual. The surface roughness of thewafer surface by chemical cleaning can be reduced, and the cost requiredfor manufacturing cleaning liquid can also be reduced.

[0023] In the typical CMP, for example, hard foamed polyurethane and thelike can be used as polishing cloth, and fumed silica with alkali suchas potassium hydroxide or ammonia added can be used as polishing slurry.Brush cleaning is a method for scrubbing and cleaning the wafer surfaceby means of a brush (the material is, for example, polyvinyl alcohol)while flowing pure water or aqueous alkali solution onto.

[0024] Such a method for physically removing particles attached onto awafer surface is applicable irrespective of whether the surface is asilicon surface (the flow in FIG. 1(A)) or an oxide film surface (theflow in FIG. 1(B)) to remove a void generation source very effectively.In particular, CMP physically scrapes the underlayer silicon or oxidefilm together with contaminants such as particles on the wafer surface.It is possible to improve surface roughness caused in the ionimplantation step.

[0025] In step (e), the wafer surface to which ions are implanted issubjected to the impurities removing process (d) by physical processsuch as CMP, and then, the other wafer 2 (the base wafer) is superposedand closely contacted thereonto. The surfaces of the two wafers arecontacted with each other at room temperature under clean atmosphere, sothat the wafers are joined together without using an adhesive. In thiscase, the other wafer 2 (the base wafer) in the flow in FIG. 1(B) may beformed with an oxide film on the surface as needed.

[0026] Step (f) is a separation heat treatment process in which thejoined wafer is separated at the enclosing layer formed by ionimplantation as boundary to be isolated into a separated wafer 5 and anSOI wafer 6 (SOI layer 7+buried oxide layer 3′+base wafer 2). The joinedwafer is subjected to heat treatment under an rare gas atmosphere or anoxidizing gas atmosphere at about temperatures of 400 to 600° C., so asto be isolated into the separated wafer 5 and the SOI wafer 6 by thecrystal rearrangement and bubble coagulation. At the same time, thecontact surface can be bonded strongly to some extent at roomtemperature. The separated wafers 5, 5′ in the flows in FIGS. 1(A) and1(B) can be reused by performing, as needed, a reclaim process forremoving the oxide film on the surface and polishing the separatedsurface.

[0027] To use the SOI wafer 6 in the device manufacturing step, thebonding force by the separation heat treatment of the step (f) is notsufficient. The SOI wafer 6 is subjected to heat treatment at hightemperature as the bonding heat treatment of step (g) so as tosufficiently enhance the bonding strength. The heat treatment can beperformed, for example, under an rare gas atmosphere or an oxidizing gasatmosphere at temperatures within a range of 1000 to 1200° C. and forabout 30 minutes to 5 hours. A rapid heating and rapid cooling apparatussuch as lamp heater is used to give sufficient bonding strength attemperatures of 1000 to 1350° C. for a short time of about 1 to 300seconds.

[0028] When the bonding heat treatment of the step (g) serves as theseparation heat treatment of the step (f), the step (f) nay be omitted.

[0029] Step (h) is a mirror polishing step for removing a damage layerand surface roughness present in the cleavage plane (the separatedsurface) as the surface of the SOI layer. This step can performpolishing called touch polish with very small amount of polishing stockremoval, and add heat treatment under a reducing atmosphere includinghydrogen after touch polish. When only heat treatment is performed underthe reducing atmosphere including hydrogen without performing touchpolish, the damage layer and surface roughness can be removed and canserve as the bonding heat treatment of the step (g). The step (h) ismore efficient.

[0030] From the above-mentioned steps, it is possible to manufacture abonded SOI wafer with little generation of voids or no generation ofvoids.

[0031] The present invention is not limited to the above-mentionedembodiment. For example, the above-mentioned embodiment describes theprocess for manufacturing an SOI wafer by bonding two silicon waferstogether through an oxide film using the ion implantation separationmethod. The present invention is applicable to another method formanufacturing a bonded wafer, that is, in the case that after ionimplantation, silicon wafers are directly bonded together not through anoxide film, as well as in the case that ions are implanted to a siliconwafer, and the wafer is directly bonded to an insulator wafer such asSiO₂, SiC and Al₂O₃, thereby manufacturing an SOI wafer.

[0032] The above-mentioned embodiment describes the case that in thehydrogen-ion separation method, the wafer is subjected to heat treatmentto be separated. The present invention is also applicable to thehydrogen-ion implantation separation method in which hydrogen ions areexcited to perform ion implantation in a plasma state, therebyseparating the wafer at room temperature without performing a specialheat treatment.

EXAMPLES

[0033] SOI wafers were manufactured under the following conditions tocompare the states of voids generation. TABLE 1 (Examples andComparative examples) Example 1 Example 2 Comparative example 1 Wafer tobe used Forty silicon single crystal wafers each (twenty bond waferseach and twenty base wafers each) having diameter 200 mm, thickness 725μm, crystal axis orientation <100>, conductivity type p type,resistivity 10 to 20Ω · cm, and one of the surfaces subjected to mirrorpolishing Manufacturing flow FIG. 1 (A) FIG. 1 (B) FIG. 1 (B) Oxide filmthickness in 400 nm 400 nm 400 nm step (b) Step (c)  40 keV  80 keV  80keV H⁺ ion implantation  8 × 10¹⁶ atoms/cm²  8 × 10¹⁶ atoms/cm²  8 ×10¹⁶ atoms/cm² conditions Bond wafer surface CMP CMP Organic-substancetreatment conditions Polishing portion 100 nm Polishing portion 100 nmremoving and cleaning + SC-1 + SC-2 Separation heat treatment Under anitrogen gas atmosphere 500° C., 30 min Bonding heat treatment Under anitrogen gas atmosphere 1100° C., 2 hr Touch polish Polishing stockremoval 100 nm Result of voids observed  0 voids/wafer: 17 pieces  0voids/wafer: 16 pieces  0 voids/wafer: 10 pieces  1 void/wafer: 2 pieces 1 void/wafer: 3 pieces  1 void/wafer: 6 pieces  2 voids/wafer: 1 pieces 2 voids/wafer: 1 piece  2 voids/wafer: 3 pieces  3 voids or more: 1piece Void-free percentage  85%  80%  50%

[0034] <CMP>

[0035] Apparatus: MIRRA manufactured by Applied Materials, Inc.

[0036] <Void observation>

[0037] Apparatus: Bright light 200 manufactured by Irvine OpticalCorporation

[0038] Observation size: Void below 1 mmφ

[0039] The void observed here is referred to as a portion having thebonding surface exposed after touch polish. No voids of a size exceeding1 mmφ were not present on any wafers.

EFFECT OF THE INVENTION

[0040] As described above, in the present invention, when a bonded waferis manufactured by the ion implantation separation method, impuritiesattached onto the surface of the wafer after the ion implantation arephysically removed. Thus, organic substances and particles which cannotbe removed by the usually performed RCA cleaning or organic-substanceremoving and cleaning can be thoroughly removed, and surface roughnesscaused in the ion implantation step can be improved by polishing.

[0041] Chemical cleaning after physical removal (CMP) can lower thechemical solution concentration, so as to reduce surface roughness thanthe prior art.

[0042] The cause of void failure can be thoroughly removed to enhanceproduct yield.

1. A method for manufacturing a bonded wafer comprising: step (c) forimplanting at least one of hydrogen ions and rare gas ions from thesurface of a first wafer (1) to form a micro bubble layer (an implantinglayer) in the first wafer; step (d) for physically removing impuritiesattached onto the surface of the first wafer to which the ions areimplanted; and step (f) for separating the first wafer in a thin-filmform at said micro bubble layer by adding heat treatment to the surfaceof the first wafer subjected to the impurities removing step in closecontact with the surface of a second wafer (2).
 2. The method formanufacturing a bonded wafer according to claim 1, wherein chemical andmechanical polishing or CMP is performed as the step for physicallyremoving impurities.
 3. The method for manufacturing a bonded waferaccording to claim 1 or 2, wherein said first wafer is a silicon wafer,and before implanting ions to the silicon wafer, a silicon oxide film(3) is formed previously on the surface of the silicon wafer.
 4. Themethod for manufacturing a bonded wafer according to any one of claims 1to 3, wherein said second wafer is a silicon wafer, and the siliconoxide film (3) is formed previously on the surface of the silicon waferclosely contacted onto said first wafer.